The µPD765A
The chip that reads a disc has no interrupt line and no DMA line on the boards it was fitted to, so everything it does it does through one data register and a handshake the processor has to watch. <colophon-upd765> is that handshake, the command crossing it, and what the chip made of it.
Every name here is the datasheet’s, because a panel that renamed them would leave a reader holding two vocabularies and no way between them.
<colophon-upd765></colophon-upd765>
The four status registers
Each is shown as the byte it is, with its bits beside it: 1 where the bit is set, . where it is clear.
MSR, the main status register, is the one the processor actually polls, and the chip works it out from what it is doing rather than keeping it anywhere. RQM says a byte wants moving, DIO which way, EXM that an execution phase is under way in non-DMA mode, and CB that a command is in progress. Its low four bits are one per unit and say which drives are seeking. They are not decoded into letters and stand in the hex alone, because a seek is better watched as a head moving.
ST0, ST1 and ST2 are the command’s own findings, and they hold what the last command left until the next one runs. ST0 carries SE, EC, NR and HD; ST1 carries EN, DE, OR, ND, NW and MA; ST2 carries CM, DD, WC, SH, SN, BC and MD. Point at any of them to be told what it means.
IC and US are not bits and stand with the readings below instead: the interrupt code, which is how the last command ended, and the unit it named.
abnormal with EN is what success looks like
The first thing a reader of these panels meets is a chip that appears to be failing constantly. It is not.
Terminal count is a pin, and these boards never raise it. A read that reaches the last sector it was asked for therefore steps past it, finds the end of the cylinder, and stops — so IC reads abnormal and ST1 shows EN. That is not a fault; it is what every read on a CPC looks like, and it is what the operating system tests for. AMSDOS asks for one sector at a time with EOT set to the sector it wants, and takes either a normal end or an abnormal one carrying EN as the answer it wanted.
Where the command has got to
Phase is which of a command’s three phases is under way — the processor writing the command bytes, the chip executing, the processor reading the result.
Stage is finer, and it is where an execution phase has got to on the track itself: watching for a sector’s sync, reading an identity and its check, crossing the gap to the data, moving the field byte by byte, the two check bytes after it. A command that seems stuck is usually a chip standing at finding identity over a track that does not hold what it was asked for.
Moved counts the bytes that have crossed the data register against how many the command means to move across it — which is not always what the field takes up on the track. TC is the terminal count pin, and on this machine it is always ..
CMD is the command bytes the chip has taken, which while a command is being written is as far as the processor has got and afterwards is the whole of the last one. RES is the same for the result: every byte of it while the processor is collecting them, and the whole of the last command’s afterwards, since the chip keeps them until another command runs. C, H, R and N are the identity registers, which keep whatever the last command left in them.
Specify
SRT, HLT and HUT are the three times Specify set, in the microseconds the chip counts at the 4MHz clock these machines gave it. The datasheet’s timings are all quoted for an 8MHz clock and double at 4MHz — and the check on that is right here, since AMSDOS programs a step rate the datasheet would read as 6ms and its own listing documents as 12. ND is non-DMA mode, which these boards must use. HEAD is whether the head is loaded onto the disc.
What can be edited, and what cannot
The rule is the one the other chips follow: a register a program sets is a register a reader can set too.
Specify’s settings are exactly that. SRT, HLT and HUT are the three times the Specify command wrote, and ND the mode it chose, so all four take a value on the same terms as any other field here — committed when the control says so, refused if the control refuses it, and Escape putting everything back to the machine. A step rate halved is a seek at twice the speed, and the operating system never knows the difference.
Nothing else here can be, and the reason is the same rule read the other way. The status registers are the chip’s own findings about a command that has already run; the phase and the stage are where a command has got to. A value put into any of them would be a claim about something that did not happen, and the state machine would go on from a place it never reached. If what you want is a read that fails, the honest place to arrange one is the disc, where a sector can carry a check that does not pass — and then the chip finds it for itself.